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How did our universe come to be? We live in a computer simulation running on what I will refer to as an M(5) computer, which was initialized with 2 ^ 65,536 bits of information, or having a maximum of 2 ^ 65,533 grid intersections in its 3D lattice of wires and logic gates. (The caret ^ operator means “raised to the power of”.) More likely than not, our M(5) computer initially supported digital life forms living in a digital environment, each having bits (ones and zeros) of genetic code instead of nucleotides of DNA, and these life forms evolved in complexity (being subject to evolutionary pressures just like terrestrial life forms), eventually achieving sentience. Then they wrote a computer simulation of our universe, starting with the Big Bang and continuing to the present day.
- Tip: bulleted paragraphs like this one contain explanatory text for computer novices and those with little advanced mathematical or computer science knowledge.
Universe of Computers
There exists a series, in which M(i+1) = 2 ^ M(i), and M(0) = 1. When written on a blackboard, M(n) looks like a stack of n 2's, slanting up and to the right. If M(i) corresponds to a set of bits of size M(i), then M(i+1) corresponds to the total possible no. of sets of bits, each of length M(i). Take M(1) = 2, which corresponds to a set of 2 bits. Then M(2) = 2 ^ 2 = 4, which is the total possible no. of sets of 2 bits, and M(3) = 2 ^ 4 = 16, which is the total possible no. of sets of 4 bits.
I maintain that for every term in the series M, there exist multiple computers each having memory sizes, in bits, corresponding to that term in the series. Take M(2) = 4. There exist exactly M(3) = 16 computers, each having M(2) = 4 bits of memory. Take M(3) = 16. There exist exactly M(4) = 2 ^ 16 = 65,536 computers, each having M(3) = 16 bits of memory.
- Every number in the series M is a power of 2, but only those powers of 2 in which the exponent X in the expression 2 ^ X is also a power of 2. We are most concerned with the 5th element in the series, M(5) = 2 ^ (2 ^ 16) = 2 ^ 65,536 = roughly 10 ^ 20,000 (a one followed by 20,000 zeros). The computers capable of hosting a computer simulation of our universe are of size M(5). So are those of size M(6) or higher, but we are concerned only with M(5) computers.
- There exists a maximum number of unique M(5) computers, which is equal to M(6), and I hold that all of these computers actually exist. A computer is made unique by the initial pattern of bits (ones and zeros) in its configuration. Only a tiny fraction of these unique computers actually work. The rest are initialized to gibberish and do not function.
So for M(2) = 4, the total no. of 4-bit computers = M(3) = 16, and for M(3) = 16, the total no. of 16-bit computers = M(4) = 65,536, and for M(4) = 65,536, the total no. of 65,536-bit computers = M(5) = 2 ^ 65,536, and so on. Out of all of the possible computers of size M(4) = 65,536 bits, of which there are M(5) = 2 ^ 65,536 of those computers, exactly M(3) = 16 of those M(4) computers each just happen to contain a set of bits corresponding to one-sixteenth of the set of all computers of size M(3) = 16 bits (that set contains exactly M(4) = 65,536 computers).
In general, out of all of the possible computers of size M(i), of which there are M(i+1) = 2 ^ M(i) of those computers, exactly M(i-1) of those computers of size M(i) each just happen to contain a set of bits corresponding to a portion of size 1 / M(i-1) of the set of all computers of size M(i-1) (that set contains exactly M(i) computers).
Logic Gates
Starting with M(4) = 2 ^ 16 = 65,536, each computer having a memory size of M(4) bits consists of a 3D array of wires and logic gates. Each logic gate has 2 input wires and 1 output wire. There are a total of 16 different logic gates, each corresponding to a column of 4 ones and zeros. If you write a truth table having 2 input columns, there are a total of 4 possible rows in that truth table: (0, 0), (0, 1), (1, 0), and (1, 1). The 4 bits in the output column correspond to one of the 16 possible logic gates. Here are 2 sample truth tables, corresponding to logic gates AND and OR:
A B AND
0 0 0
0 1 0
1 0 0
1 1 1
A B OR
0 0 0
0 1 1
1 0 1
1 1 1
- Logic gates are the building blocks of digital computers. Most computers are constructed mainly out of NAND gates. A NAND gate has a truth table exactly equal to the AND gate’s truth table (above left), except all bits in the output column (A and B) are reversed (ones replaced with zeros and vice versa).
- To read a truth table, the input columns (A, B) correspond to all 4 possible combinations of the 2 input wires, A and B. Each input wire can be either a one or a zero. The output column, which is labeled “A and B” in the first sample truth table, indicates the value of the output wire. In the current clock cycle (tick of the internal computer clock that synchronizes everything), the bits in the input wires are fed into a given logic gate, and in the next clock cycle the bit in the output wire is instantaneously fed into one or more subsequent logic gates.
- The M(5) computer initially contains 2 ^ 65,536 bits of information. In the beginning, when all M(5) computers are fired up, all bits in every computer’s initial configuration are divided into 7-bit chunks. Why 7 bits? There happen to be 125 different possible configurations of grid intersections, where wires meet logic gates and other wires. Every M(5) computer consists of a 3D lattice (or grid) of wires and logic gates. The total no. of combinations of 7 bits = 2 ^ 7 = 128. So 7 bits is the least no. of bits capable of representing 125 different configurations of grid intersections. At computer-initialization time, each 7-bit chunk is replaced with the corresponding grid intersection, for all grid intersections in the computer’s 3D lattice. Then the computer starts working.
- It does of course require a leap of faith to believe that certain very large integers, in particular those containing at most 2 ^ 65,536 binary digits, spontaneously morphed into a collection of 7-bit chunks, each chunk becoming a grid intersection of wires or wires and a logic gate. And it requires another leap of faith that the resulting 3D lattices of logic gates spontaneously turned into working computers (if only in a very tiny fraction of all M(5) lattices). But having faith goes with the territory of thinking about and pondering Creation, there’s no getting around it.
All of the wires connecting to a logic gate are in the default, vertically oriented plane. There are 7 possible wiring configurations for each logic gate. We only have to consider 2 directions: right and down. The other 2 directions, up and left, include wires that belong to adjacent grid intersections. For each direction, there are 3 possibilities: no wire, outgoing wire, and incoming wire, giving 3 squared = 9 configurations. But 2 of those are invalid: no wires coming out, since each logic gate has 3 connecting wires and there are only 2 other possible directions; and 2 outgoing wires, since a logic gate can have only 1 outgoing wire. So there are a total of 9 - 2 = 7 configurations for each of 16 logic gates = 7 x 16 = 112. However, there are 2 special cases of logic gates: all zeros in the output column, and all ones in the output column. These 2 logic gates can be treated as having no input wires and one output wire, giving 3 wiring configurations for each logic gate: right, down, and no wires, for a total of 6 configurations. So the revised no. of wiring configurations involving a logic gate = 7 x 14 + 6 = 104.
As for grid intersections involving only wires, there are 20 of these. We only have to consider 3 directions: right, down, and in front, as the other 3 directions, left, up, and behind include wires that belong to adjacent grid intersections. There can be at most one input wire and 5 output wires. Four of the 20 wiring configurations involve 3 wires, at most one of which is an input wire. Nine of the 20 wiring configurations involve 2 wires, one of which is an input wire (6 configurations), or both wires being output wires (3 configurations). Six of the 20 wiring configurations involve one wire: an input wire (3 configurations); and an output wire (3 configurations). One configuration involves no wires at all. So the total no. of configurations = 4 + 9 + 6 + 1 = 20. One additional type of grid intersection is the crossover: 2 horizontal wires and 2 vertical wires in the default plane, in which the horizontal wires do not make physical contact with the vertical wires. So the total no. of wiring configurations = 104 configurations involving a logic gate plus 21 configurations involving only wires = 125. Therefore, each grid intersection requires 7 bits of information, since 2 ^ 7 = 128.
If you limit yourself to one type of logic gate, such as the NAND gate (the NOR gate can be used as well), you can get by with 4 bits per grid intersection (7 intersections involving logic gates, 8 involving 0 to 3 wires only, and one crossover, or 16 intersections in total). If you allow both scenarios, 4 bits and 7 bits per grid intersection, then you need a header record consisting of up to 125 7-bit values. The no. of 7-bit values equals the no. of different grid intersections, so if there are only 16 of them then you only need 4 bits of data per grid intersection.
In addition to the optional header record of up to 125 7-bit values, you also need two 7-bit header values indicating the no. of default planes in the grid, as well as the width of each plane. Both values are limited to powers of 2, so if the width value is say 17, then the grid is 2 ^ 17 = 131,072 intersections wide. So with M(5) = 2 ^ 65,536 bits of data per grid, the two 7-bit header values are powers of 2 = 2 ^ X, and with M(6) they are both of the form 2 ^ (2 ^ X). The width of the default plane of an M(5) computer should be at least M(4) = 65,536, since the word size or address size of an M(5) computer must be close to 65,536 bits long, in order to be able to address all rows of that computer, of which there are up to 2 ^ 65,536 rows. (It’s actually somewhat less than 2 ^ 65,536 rows, but certainly a lot more than say 2 ^ 65,500.)
Very Large Number
The 2 ^ 65,536 bits in the M(5) computer hosting the computer simulation of our universe is far more data capacity than is needed to host that simulation. Also, if we impose a time limit of 2 ^ 65,536 clock cycles, that’s far more time than is needed as well. Let's say for each iteration in the simulation's algorithm, all interactions between every possible pair of subatomic particles are computed. Our universe has very roughly 10 ^ 100 subatomic particles. So the no. of interactions between each possible pair of particles equals (10 ^ 100) ^ 2 = 10 ^ 200. Let's say for the sake of argument that it takes one billion clock cycles to compute each 2-particle interaction. Then each iteration would take (10 ^ 200) x (10 ^ 9) = 10 ^ 209 clock cycles. Now, I've seen it written that the shortest possible time period, according to quantum theory, equals 10 raised to the power of -44 seconds (one divided by 10 ^ 44 seconds). Let's say that the no. of iterations in the computer simulation algorithm equals 10 ^ 44 per second. That's (10 ^ 209) x (10 ^ 44) = 10 ^ 253 clock cycles per second. At 30 million seconds/year, that's about (10 ^ 253) x (10 ^ 8) = 10 ^ 261 clock cycles per year. Our universe is about 15 billion years old, so by now we've used up roughly (10 ^ 261) x (10 ^ 10) = 10 ^ 271 clock cycles. But we have roughly 10 ^ 20,000 clock cycles to work with, so we obviously have way more clock cycles at our disposal than we need to model our universe. Furthermore, if there are only 10 ^ 100 subatomic particles in our universe, 2 ^ 65,536 bits (roughly 10 ^ 20,000) is far more memory than we need to model all those particles.
Philosophical Implications
There is no God, only the humble logic gate, and a vast set of integers acted on by those logic gates. Our Creators are software entities, themselves forged and molded by digital, evolutionary processes. They possess great intelligence, but they themselves are composed of nothing but ones and zeros in a sea of logic gates. The set of all M(5) computers, which includes the computer that hosts the simulation which is our universe, although finite, is unimaginably vast. One could argue that sentient digital life forms are superfluous, since a canned simulation of a universe such as ours could take place without the need for an Intelligent Designer. But I would counter that universes hosting digital life forms are much more numerous than universes hosting mere canned simulations, so we in all likelihood live in a simulation hosted in such a digital universe. So there probably really is a God or Creator(s), made possible by a foundation of logic gates and who evolved, just like we did. You could say that in that respect we really were created in God’s image. Not literally or visually, but rather in an evolutionary and intellectual sense. And all of it is based on purely mathematical lattices (as oppose to actual, physical lattices) of wires and logic gates. Praise be.
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